5.00 credits
30.0 h + 30.0 h
Q1
Teacher(s)
Legat Jean-Didier;
Language
English
> French-friendly
> French-friendly
Main themes
Combinational logic circuits and sequential logic design. Digital building blocks (ALU, registers, ...).Hardware description language (SystemVerilog). Microarchitecture of a 32-bit RISC processor (single-cycle processor, multicyle processor and pipelined processor). Embedded processor architecture and I/O systems.
Learning outcomes
At the end of this learning unit, the student is able to : | |
| 1 |
In consideration of the reference table AA of the program "master in electrical engineering ", this course contributes to the development, to the acquisition and to the evaluation of the following experiences of learning:
|
Content
- Combinational logic
- Sequential logic
- Implementation technology
- Simulation language and Verilog synthesis
- Main logic circuits: arithmetic circuits, memories, programmable circuits
- Architecture and microarchitecture of the ARM processor
- Memories (caches, ...)
- Peripherals and main communication systems
Teaching methods
- Learning is based on readings and tasks with compulsory homework.
- Each student (or goup of 2 students) has at his disposal during the semester an electronic system comprising an FPGA connected to a RaspberryPI
Evaluation methods
The evaluation is based on a continuous evaluation during the academic year. The practical details are specified on the course website.
Other information
None
Online resources
Bibliography
Digital Design and Computer Architecture - David Money Harris @ Sarah L. Harris - 2007, Elsevier
Faculty or entity
ELEC
