Electronic Circuits and Systems

Figure : Architecture of a smart sensor node with the related challenges for a sustainable Internet-of-Things

The research direction in electronic circuits and systems at UCL spreads over all levels of abstraction in integrated circuit (IC) design: from nanoscale CMOS process technology to disruptive analog/digital/RF circuit building blocks to complex mixed-signal systems-on-chip (SoCs). An overview of current and latest research activities can be found in this presentation.

Principal Investigators :

David Bol, Denis FlandreJean-Didier Legat, François-Xavier Standaert

Research Areas :

Robust circuit design in emerging CMOS technologies both in More-Moore and More-than-Moore directions require accurate technology characterization and models. In the ECS group, a strong focus is put on analog/RF characterization of these emerging technologies as well as on research in digital design enablement and the study of new concepts related to on-chip sensors, actuators and energy harvesters.

Since 2000, the spectrum of electronic circuits systems is no longer divided into high-performance (high-speed, high accuracy, high robustness, etc.) and low-power applications. Indeed, energy efficiency is today paramount for all types of applications including high-performance computing, wireless communications, remote sensing, harsh-environment operation, power management, etc. In this context, research is carried out in the ECS group to improve the energy efficiency of various types of high-performance applications. Research at the circuit design abstraction level are focused on both analog and digital design methodologies, analog/mixed-signal (AMS) building blocks (RF, power management), digital architecture (DSP, memories) and adaptive techniques, sensing circuits (imagers, biosensors, ADC).

Securing small embedded devices against mathematical and physical attacks while maintaining the level of performances of emerging applications (sensor networks, RFIDs, Internet of Things) is a challenging optimization goal. It usually requires mixing advances at different abstraction levels (protocol, algorithmic, implementation). In this context, we investigate tracks to take advantage of advanced technologies in order to both reduce the implementation and energy cost, and the security of the chip against tampering attacks, fault attacks and side-channel attacks.

The Internet-of-Things (IoT) is progressively changing the way we live but its development triggers key technical challenges. IoT-related researches in the ECS group targets sustainability aspects of the IoT both technical and environmental, energy-harvesting operation (harvesters and power management) and ultra-low-power SoC design with experimental prototyping of SoCs including computing, sensing, wireless communication and power management.

Simulation and design tools are based on industry-standard softwares for integrated processes, devices and circuits. Prototyping is based on both cutting-edge CMOS manufacturing processes from industrial leaders (ST-Microelectronics, TSMC, UMC, X-Fab) and home-brewn processes for functionality diversification (“More than Moore”) supported by UCL WinFab facility. Circuits and systems characterizations are supported by UCL Welcome facility in a very large range of operating conditions (frequencies, temperatures, mechanical stress). Component irradiation for space, biomedical and nuclear physics related investigations is available at the nearby cyclotron research centre on benches qualified by ESA.

The design of custom ICs and SoCs is further investigated in collaboration with experts in the field of application of the circuits (e.g.: image processing, robotics, biomedical, smart sensors, aerospace, radiation hardness, nuclear science, high temperature, energy harvesting, green electronics, ultra low power, RFID, flexible electronics, telecommunication, RF, security, cryptography, etc).

Recent collaborations in electronics circuits and systems include: CEA-LETI (France), ST-Microelectronics (France), CNM (Spain), EADS (France), nSilition (Belgium), CISSOID (Belgium), Deltatec (Belgium), ACIC (Belgium), CETIC (Belgium), IMEC-Holst (Netherlands), AMS (Austria), MGL (Austria), Siemens (Germany), Samsung (UK), Fraunhofer (Germany), Thales (Belgium, France), SOI Industrial Consortium (USA), P.E. International (USA), Purdue University (USA).

Major recent projects (Funding, Topic) include : NanoSec (ARC, security), MSP (FP7, smart building), SAVE (RW, smart buildings/cities), CRASH (ERC, security), STARflo+ (RW, biomedical), TRIADE (FP7, aerospace), E-User (RW, RFID), EUROSOI+ (FP7, low-power SOI), MIMOCOM (RW, MIMO RF systems), S@T (RW, radiation hardness), Trappist (FNRS, nuclear physics), NANOTIC (RW, biochemical wireless sensors).

Most recent publications

Below are listed the 10 most recent journal articles and conference papers produced in this research area. You also can access all publications by following this link : see all publications.

Journal Articles

1. Sabri Alirezaei, Iman; André, Nicolas; Amor, Sedki; Gérard, Pierre; Flandre, Denis. An Ultra-Thin Ultraviolet Enhanced Backside- Illuminated Single-Photon Avalanche Diode with 650nm-Thin Silicon Body Based on SOI Technology. In: IEEE Journal of Selected Topics in Quantum Electronics, , p. 11 (2021). doi:10.1109/JSTQE.2021.3129274. http://hdl.handle.net/2078.1/253906

2. Moreau, Nicolas; Pirson, Thibault; Le Brun, Grégoire; Delhaye, Thibault; Sandu, Georgiana; Paris, Antoine; Bol, David; Raskin, Jean-Pierre. Could Unsustainable Electronics Support Sustainability. In: Sustainability, Vol. 13, no.6541, p. 7 (2021). doi:/10.3390/su13126541. http://hdl.handle.net/2078.1/251547

3. Pirson, Thibault; Bol, David. Assessing the embodied carbon footprint of IoT edge devices with a bottom-up life-cycle approach. In: Journal of Cleaner Production, Vol. 322, no. 128966, p. 13 (2021). doi:10.1016/j.jclepro.2021.128966. http://hdl.handle.net/2078.1/251545

4. Xhonneux, Mathieu; Afisiadis, Orion; Bol, David; Louveaux, Jérôme. A Low-Complexity LoRa Synchronization Algorithm Robust to Sampling Time Offsets. In: IEEE Internet of Things Journal, , p. 14 (2021). doi:10.1109/JIOT.2021.3101002 (Accepté/Sous presse). http://hdl.handle.net/2078.1/251518

5. M. V. Cunha, José; Barreiros, M. Alexandra; Curado, Marco A.; Lopes, Tomás S.; Oliveira, Kevin; Oliveira, António J. N.; Barbosa, João R. S.; Vilanova, António; Brites, Maria João; Mascarenhas, João; Flandre, Denis; Silva, Ana G.; Fernandes, Paulo A.; Salomé, Pedro M. P. Perovskite Metal–Oxide–Semiconductor Structures for Interface Characterization. In: Advanced Materials Interfaces, , p. 1-12 (2021). doi:10.1002/admi.202101004. http://hdl.handle.net/2078.1/251370

6. Roisin, Nicolas; Brunin, Guillaume; Rignanese, Gian-Marco; Flandre, Denis; Raskin, Jean-Pierre. Indirect light absorption model for highly strained silicon infrared sensors. In: Journal of Applied Physics, Vol. 30, no.5, p. 30 (2021). doi:10.1063/5.0057350 (Accepté/Sous presse). http://hdl.handle.net/2078.1/249729

7. Chen, Qi; Li, Guoli; André, Nicolas; Liu, Xingqiang; Xia, Zhen; Flandre, Denis; Liao, Lei. Origin of Low-Temperature Negative Transconductance in Multilayer MoS2 Transistors. In: Applied Physics Letters, , p. 10 (2021). doi:10.1063/5.0058545 (Accepté/Sous presse). http://hdl.handle.net/2078.1/249728

8. Nait Saada, Tamazouzt; Pang, Liuqing; Sravan Kumar, Kilaparthi; H.B. Dourado, André; D. Germano, Lucas; D. Vicentini, Eduardo; P.L. Batista, Ana; G.S. de Oliveira-Filho, Antonio; Dumeignil, Franck; Paul, Sébastien; Wojcieszak, Robert; Melinte, Sorin; Sandu, Georgiana; Petretto, Guido; Rignanese, Gian-Marco; Henrique Braga, Adriano; F. Rosado, Taissa; Meziane, Dalila; Boukherroub, Rabah; I. Córdoba de Torresi, Susana; G.M. da Silva, Anderson; Szunerits, Sabine. The importance of the shape of Cu2O nanocrystals on plasmon-enhanced oxygen evolution reaction in alkaline media. In: Electrochimica Acta, Vol. 390, no. 138810 (2021). doi:10.1016/j.electacta.2021.138810. http://hdl.handle.net/2078.1/249120

9. Dekimpe, Rémi; Bol, David. A Configurable ULP Instrumentation Amplifier with Pareto-Optimal Power-Noise Trade-Off Achieving 1.93 NEF in 65nm CMOS. In: IEEE Transactions on Circuits and Systems. Part 2: Express Briefs, Vol. 68, no.7, p. 2272-76 (2021). doi:10.1109/TCSII.2021.3059311. http://hdl.handle.net/2078.1/248911

10. Bol, David; Schramme, Maxime; Moreau, Ludovic; Xu, Pengcheng; Dekimpe, Rémi; Saeidi, Roghayeh; Haine, Thomas; Frenkel, Charlotte; Flandre, Denis. SleepRunner: A 28-nm FDSOI ULP Cortex-M0 MCU With ULL SRAM and UFBR PVT Compensation for 2.6–3.6-μW/DMIPS 40–80-MHz Active Mode and 131-nW/kB Fully Retentive Deep-Sleep Mode. In: IEEE Journal of Solid State Circuits, Vol. 56, no.7, p. 2256-2269 (2021). doi:10.1109/JSSC.2021.3056219. http://hdl.handle.net/2078.1/248907

Conference Papers

1. Amor, Sedki; Kilchytska, Valeriya; Tounsi, Fares; André, Nicolas; Francis, Laurent; Flandre, Denis. In-situ recovery of on-membrane PD-SOI MOSFET from TID defects after gamma irradiation. In: 2021 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS), 2021, 978-1-6654-3745-5 xxx. doi:10.1109/EuroSOI-ULIS53016.2021.9560673. http://hdl.handle.net/2078.1/252876

2. Dekimpe, Rémi; Schramme, Maxime; Lefebvre, Martin; Kneip, Adrian; Saeidi, Roghayeh; Xhonneux, Mathieu; Moreau, Ludovic; Gonzalez Gonzalez, Marco Antonio; Pirson, Thibault; Bol, David. SleepRider: a 5.5µW/MHz Cortex-M4 MCU in 28nm FD-SOI with ULP SRAM, Biomedical AFE and Fully-Integrated Power, Clock and Back-Bias Management. In: Proceedings of the 2021 Symposium on VLSI Circuits. p. 2 (28/07/2021). IEEE, 2021 xxx. doi:10.23919/VLSICircuits52068.2021.9492365. http://hdl.handle.net/2078.1/251534

3. Xhonneux, Mathieu; Louveaux, Jérôme; Bol, David. Implementing a LoRa Software-Defined Radio on a General-Purpose ULP Microcontroller. In: Proceedings of the 2021 International Workshop on Signal Processing Systems, 2021 xxx. http://hdl.handle.net/2078.1/251524

4. Zeng, Xi; Zhukova, Maria; Faniel, Sébastien; Proost, Joris; Flandre, Denis. Material, optical and electrical characterization of DC sputtered CuO by tuning oxygen concentration. In: Proceedings of the EMRS-Spring meeting 2021, 2021 xxx. http://hdl.handle.net/2078.1/248726

5. Lefebvre, Martin; Moreau, Ludovic; Dekimpe, Rémi; Bol, David. A 0.2-to-3.6TOPS/W Programmable Convolutional Imager SoC with In-Sensor Current-Domain Ternary-Weighted MAC Operations for Feature Extraction and Region-of-Interest Detection. In: Proceedings of the 2021 IEEE International Solid-State Circuits Conference. p. 118-119 (03/03/2021). IEEE, 2021 xxx. http://hdl.handle.net/2078.1/243970

6. Bol, David; Pirson, Thibault; Dekimpe, Rémi. Moore's Law and ICT Innovation in the Anthropocene. In: Proceedings of the IEEE Design, Automation and Test in Europe Conference 2021, 2021 xxx. http://hdl.handle.net/2078.1/243578

7. Li, Guoli; He, Jiawei; Flandre, Denis; Liao, lei. Defect Engineering in n-Type Oxide Semiconductor TFTs. 2020 xxx. http://hdl.handle.net/2078.1/249252

8. Wei, Peng; André, Nicolas; Zeng, Xi; Sabri Alirezaei, Iman; Li, Guoli; Bouterfa, Mohamed; Francis, Laurent; Flandre, Denis. Micrometer-thin SOI Sensors for E-Skin Applications. In: IEEE Sensors. Proceedings. I E E E, 2020 xxx. doi:10.1109/SENSORS47125.2020.9278716. http://hdl.handle.net/2078.1/243039

9. Frenkel, Charlotte; Legat, Jean-Didier; Bol, David. A 28-nm Convolutional Neuromorphic Processor Enabling Online Learning with Spike-Based Retinas. In: Proceedings of ISCAS 2020. p. 5. IEEE, 2020 xxx. doi:10.1109/ISCAS45731.2020.9180440. http://hdl.handle.net/2078.1/236441

10. Flandre, Denis; Schramme, Maxime; Gimeno Gasca, Cecilia; Drouguet, Maxime; André, Nicolas; Craeye, Christophe; Bol, David. Cinq générations de chips UWB (Ultra-Wide-Band) pour la géo-localisation et la transmission de données à très basse consommation. 2020 xxx. http://hdl.handle.net/2078.1/227585